![And here's Intel's Epyc response: Up-to 56-core, 4GHz 14nm second-gen Xeon SP chips, Agilex FPGAs, persistent mem • The Register And here's Intel's Epyc response: Up-to 56-core, 4GHz 14nm second-gen Xeon SP chips, Agilex FPGAs, persistent mem • The Register](https://regmedia.co.uk/2019/04/02/intel_xeon_9200_series.jpg)
And here's Intel's Epyc response: Up-to 56-core, 4GHz 14nm second-gen Xeon SP chips, Agilex FPGAs, persistent mem • The Register
![Intel Rolls Out Next-Gen Data Center Portfolio; 100 Gigabit Ethernet, Optane DC, Hewitt Lake, and Cascade Lake With Up to 56 Cores – Page 5 – WikiChip Fuse Intel Rolls Out Next-Gen Data Center Portfolio; 100 Gigabit Ethernet, Optane DC, Hewitt Lake, and Cascade Lake With Up to 56 Cores – Page 5 – WikiChip Fuse](https://fuse.wikichip.org/wp-content/uploads/2019/04/intel-dc-event-clx-ap-overview.png)
Intel Rolls Out Next-Gen Data Center Portfolio; 100 Gigabit Ethernet, Optane DC, Hewitt Lake, and Cascade Lake With Up to 56 Cores – Page 5 – WikiChip Fuse
![Intel Rolls Out Next-Gen Data Center Portfolio; 100 Gigabit Ethernet, Optane DC, Hewitt Lake, and Cascade Lake With Up to 56 Cores – Page 5 – WikiChip Fuse Intel Rolls Out Next-Gen Data Center Portfolio; 100 Gigabit Ethernet, Optane DC, Hewitt Lake, and Cascade Lake With Up to 56 Cores – Page 5 – WikiChip Fuse](https://fuse.wikichip.org/wp-content/uploads/2019/04/intel-dc-launch-cascade-lake-ap-9200.png)